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The New Wave: Introducing Deming Chen

Clearing Roadblocks on the Semiconductor Highway

By Doug Peterson

December 2006

CMOS technology is expected to continue to dominate the semiconductor industry for another 15 years, leading to spectacular feats of scaling -- with over 17 billion transistors integrated on a single microchip. What’s more, chip speed is projected to increase to over 73 gigahertz, while the size of devices shrinks down to 14 nanometers by the year 2020.

All of this is forecasted by the latest International Technology Roadmap for Semiconductors -- the blueprint for semiconductor advances, says Deming Chen, a professor who joined the CSL staff in August of 2005.

However, Chen and others see a sizable brick wall sitting squarely in the path of the semiconductor industry. They see a looming “productivity gap,” caused by incredible design complexities and technical problems that arise at such small dimensions.

Going hand-in-hand with design complexities are rapidly rising development costs, which include both the design and manufacturing costs for integrated circuits.

Chen is tackling many of these problems, building upon his work as a PhD graduate from UCLA in 2005. At UCLA, he designed LOPASS, the first academic low-power FPGA architectural synthesis system -- a system designed to lower power requirements for FPGA (field-programmable gate array) chips based on a higher-level of design abstraction.

“Field programmability, as a silicon technology, and system-level design, as a design automation technology, are both critical for dealing with the problems of an expanding productivity gap and the growing development cost," Chen points out.

Being able to lower power requirements on increasingly complex chips will be important down the road, so Chen is continuing to pursue low-power work at CSL. For instance, his research has come up with optimal solutions for designing integrated circuits with multiple supply voltages.

This work confronts issues with the “critical path” -- the longest path that a signal must pass through on a circuit. The critical path is often the bottleneck that slows down circuit speed. But one possible solution is multiple-supply voltages. The idea, Chen says, is to selectively use higher supply voltages to boost the speed of the signal moving along the longer, critical path, while using lower voltages for the shorter paths.

Such a strategy boosts speed while lowering power requirements.

“But how do we do this when the different pathways may be tangled with each other?” he asks. “We have a system for coming up with an optimal solution in two different areas -- behavior synthesis and logic synthesis.”

Chen’s own path to CSL was a circuitous one, beginning in China where he was born. He actually started out in chemistry, receiving his undergraduate degree in China. His undergraduate thesis, however, was writing programs in BASIC language for a computer that controlled x-ray machines to detect crystalline structures. This experience drew him deeply into the world of computers. Then in 1992 he came to the United States -- Eugene, Oregon to be specific.

He went on to receive a bachelor’s degree in computer science from the University of Pittsburgh in 1995. After gaining experience in industry, he then moved on to UCLA where he did his graduate work -- all leading up to his recent arrival at CSL.

Other research directions for Chen include work on variation-aware microarchitecture/SoC design, as well as nanotechnology. In nanotechnology, for instance, he is working on a hybrid, 3-D FPGA circuit that uses traditional, time-tested CMOS for logic but also uses the newer nanotube bundles for the interconnects and nanowire-based crossbars for distributed memories.

According to Chen, nanowires can be packed much denser than traditional CMOS devices for building memories, and carbon nanotube bundles have outstanding thermal and performance features compared to metal interconnects. The potential drawback is a greater percentage of fabrication defects.

Nanotechnology is not yet a very mature technology, he says, but it is sure to play a big role in the continuing quest for low power and high performance.

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